The present invention relates to radar and communications systems and more particularly to frequency synthesizers employed therein.
In radar systems, the frequency of the transmitted signal may be varied within the frequency range for which the radar system is designed. Different transmitting frequencies are needed to enable the radar system to detect different targets that have different resonant frequencies. The radar transmitting frequency may also be varied within the frequency range of the radar system to escape electronic jamming.
Communication systems may also employ variable frequency transmission. Changes can thus be made in the transmitting frequency to provide stability of reception or simply to change the channel over which system broadcasting occurs.
Frequency synthesizers have been and are now employed to generate variable transmission frequencies for radar and communication systems. Various synthesizer circuit designs have been developed in the past to meet radar or communication system needs An indirect synthesizer design is one design concept that has been commonly employed in prior frequency synthesizers.
In the indirect synthesizer, at least one phase lock loop is used for frequency generation within a limited frequency range. Most phase lock loops employ a voltage controlled oscillator (VCO), a phase detector and a variable divider.
In older and/or simpler designs, the variable or programmable divider is typically employed in a feedback loop to vary the frequency output indirectly. An input frequency signal f.sub.i is applied to a phase detector from a system master oscillator which is used to lock all system components together for system frequency and phase stability. The desired output frequency f.sub.o is reached when phase lock occurs, that is when the input frequency f.sub.i equals the output frequency divided by the divisor N.
The sensitivity of a radar system to target return signals is highly dependent on the phase noise and spur (spurious signals) characteristics of the frequency synthesizer used in the radar system. Generally, the return signal is characterized with a Halford envelope that defines the phase noise amplitude to each side of the transmit or center frequency and within the return frequency scan range (up to 300 KHz or more).
The highest amplitude phase noise is near the center frequency and the phase noise decreases in amplitude toward the noise floor to each side of the center frequency. If the radar phase noise is greater in amplitude than the target signal, the target signal cannot be distinguished. To provide increased radar system capability for identifying lower radar cross-section targets, it is necessary that radar phase noise be further reduced. Accordingly, it is highly desirable that phase noise generated by radar frequency synthesizers be minimized.
Similarly, spur signals generated by the frequency synthesizer may result in spurs in the radar return signal within the Halford envelope. If the amplitude of a return spur exceeds the phase noise amplitude, a target identification interference is created. Accordingly, it is also highly desirable to minimize spurious signals generated by radar frequency synthesizers.
Indirect frequency synthesizers have generally been unable to meet the needs of advancing radar and communications system technology. Thus, in addition to the need to operate with very low phase and spurious noise, frequency synthesizers desirably should have the capability to change frequency over large bandwidths at a very rapid rate.
Phase noise performance of the indirect synthesizer with a programmable frequency divider in the feedback path has been poor, particularly since divider phase noise is multiplied in most indirect synthesizer designs. Further, the fastest of the typical indirect synthesizers have slow switching speeds on the order of milliseconds. Many indirect synthesizers even have difficulty in generating frequencies over a single octave due to voltage controlled oscillator limitations.
In more recent indirect frequency synthesizers, loop filtering of spurs has been improved and phase noise has been reduced through use of a calibrated digital/analog input voltage control circuit instead of the conventional feedback voltage divider. Switching time has been reduced to about ten microseconds and phase noise has been reduced to the point where the limiting factor has become the noise of the voltage controlled oscillator itself. Typical X-Band radars have -120 dbc per Hz phase noise floors with -80 dbc in band spurs.
From an overall perspective, the basic indirect frequency synthesizer design appears to have reached a development limit with respect to reducing phase and spurious noise and switching time. In fact, increasing product complexity itself has led to additional internal noise sources and further has resulted in more complicated and expensive maintenance procedures.
The direct frequency synthesizer design has provided additional possibilities for improvement although the realization of actual improvements has been limited. Thus, the direct frequency synthesizer design offers the possibility of producing better product performance, especially shorter switching times and lower phase and spurious noise, while simultaneously providing design simplicity that enhances product reliability and reduces product cost.
In the direct frequency synthesizer, a set of input frequency signals differ from each other by a fixed increment and are derived from a single master oscillator and beat against a second set of frequency signals in a first stage mixer. A larger set of frequency signals are generated at the output of the first stage, with the output signals differing from each other by a smaller fixed increment. A second and additional stages can be cascaded to the first stage and similarly structured and operated to produce a final output frequency signal that is selected by switchable filters.
Many prior direct synthesizer designs are limited to single-stage circuits which are limited in frequency generation capability. The conventional "mix-and-divide" direct synthesizers do use cascaded stages but are nonetheless essentially limited to narrow bandwidth operation. Typically, only the sum sideband is passed from the mixer output by a single output filter and the divider N is essentially limited to 4 because problems are encountered with use of higher N values.
Expansion of the bandwidth of mix-and-divide synthesizers requires additional fixed frequency inputs. In turn, the output filter skirt becomes limiting and rejection of the added frequencies requires additional filters. Thus, bandwidth expansion is possible but the resulting mix-and-divide circuitry soon becomes highly complex. In any case, spur and phase noise performance of mix-and-divide synthesizers has been inadequate to meet state-of the-art requirements.
R. J. Papaieck U.S. Pat. No. 4,725,786 entitled "FULL-OCTAVE DIRECT FREQUENCY SYNTHESIZER" and issued on Feb. 16, 1988 (hereinafter referred to as the 786 patent) provides some improvement over previous art, and is perhaps representative of the current state of the art for cascaded direct frequency synthesizers. Generally, the 786 patent discloses a direct frequency synthesizer that has cascaded stages, specifically ten stages, and operates with limited improvement in switching time and spur and phase noise performance.
The 786 cascaded circuit design is directed to achieving full octave bandwidth for a specific frequency range, i.e. 500 MHz to 1000 MHz, with use of a specific divider ratio 10. Further, mixer, filter, and switching circuitry is made relatively complex to produce a continuous full-octave frequency generation capability. Some of the stages have like circuit designs, but other stages disadvantageously have different circuit designs needed to meet specific mixing, filtering and switching requirements.
Overall, the 786 patent is structured to a specific divider ratio (10) and provides no basic disclosure nor direction for structuring direct frequency synthesizers to implement output frequency plans that fall within a frequency range that is much broader than the 786 output frequency range. Finally, to the extent that the 786 disclosure may be extrapolated to other frequency range applications, it nonetheless has limited switching time and spur and phase noise performance and is encumbered with the described circuit complexities which detract from product reliability, efficiency and economy.